5 V, 3 µm CMOS, 1 PolySi, 1 Me
Parameter | Meaning |
---|---|
Application, features | Small and medium-scale integration logic IC, VDD < 5 V NMOS: Vtn=0.8-1.2 V, Ic >4 mA. Ubr>8V PMOS: Vtр=0.8-1.2 V, Ic >2 mA, Ubr>8V |
Process Description | Number of masks, pcs. 11 Design rule,µm 2.0 Substrate: Si/P-doped/ n-type/Res 4.5 N/P-wells depth, µm 6-8 Gate SiO2, Å 425 / 300 Interlayer dielectric: BPSG Channel length: NMOS/PMOS, µm 3-4 Space line PolySi, µm 10 Contacts, µm 4*4 Space line Me, µm 10 |
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Tel.: .....(+375 17) 272 3729
......(+375 17) 353 2257
Fax:......(+375 17) 353 2257
E-mail: export@integral.by