1.5 V, 1.6 µm CMOS, 1 PolySi, 1 Me, low threshold, 150mm wafers

1.5 V, 1.6 µm CMOS, 1 PolySi, 1 Me, low threshold, 150mm wafers

  • Application, features: Medium-scale integration digital IC for electronic timepieces and micro calculators, VDD 1.5 V¸3 V.<br /><br /> <br /><br />NMOS: Vtn= 0.5 V, Usd >10 V<br /><br />PMOS: Vtp= -0.5 V, Usd >10 V
  • Process Description: Number of masks, pcs.                                                    11<br /><br />Design rule,µm                                                              1.6<br /><br />Substrate:           Si/ B-doped/ p-type/Res 12          2 wells                          <br /><br />N/P-well depth, µm                                                        5/6<br /><br />Gate SiO2, Å                                                                 300<br /><br />Interlayer dielectric – BPSG<br /><br />Channel length: NMOS/PMOS, µm                               2.0<br /><br />space line PolySi , µm                                                    3.2    <br /><br />contacts, µm                                                                Ø 1.5<br /><br />space line Me, µm                                                           3.6