Power field MOS transistors, Umax= 60÷900 V, 150 mm wafers

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Power field MOS transistors, Umax= 60÷900 V, 150 mm wafers

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Parameter	Meaning
Application, features	MOSFET NMOS: Vtn=2÷4 V Umax= 60÷900 V
Process Description	Number of masks, pcs. 8 Min design rule,µm 2.0 Substrate: Si/Sb-doped/ n-type/Res 0,015; Si/ As-doped/ n-type/ Res 0,003 Epi layer: thickness 8÷75) µm Resistivity (0,67÷31,5) Ohm/cm Gate oxide (60÷100) nm Interlayer dielectric medium temp. oxide + BPSG Passivation PEoxide + PE SI3N4

Parameter

Meaning

Application, features

MOSFET

NMOS: Vtn=2÷4 V

Umax= 60÷900 V

Process Description

Number of masks, pcs.                                                8

Min design rule,µm                                                    2.0

Substrate:                  Si/Sb-doped/ n-type/Res 0,015;

                                   Si/ As-doped/ n-type/ Res 0,003

Epi layer:

thickness                                                         8÷75) µm

Resistivity                                     (0,67÷31,5) Ohm/cm

Gate oxide                                                  (60÷100) nm

Interlayer dielectric       medium temp. oxide + BPSG

Passivation                                   PEoxide + PE SI3N4

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