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5 V, 1.6 µm CMOS, 2 PolySi,1 Me, EEPROM, 150 mm wafers

5 V, 1.6 µm CMOS, 2 PolySi,1 Me, EEPROM, 150 mm wafers

Parameter Meaning
Application, features Medium-scale integration EEPROM, VDD:2,4 V… 6  V

 

NMOS: Vtn=(0,65+-0,25)V, 

Usd >=12 V

PMOS: Vtр=-(0,8+-0,2)V,

Usd ≤-12 V

 

HV- NMOS: Vtn=(0,45+0,15)V Usd³17 V

HV- РMOS: Vtр=-(0,8+0,2)V    Usd ≤-16 V
Process Description Number of masks, pcs.                                             17

Design rule, µm                                                       1.6

Substrate: Si/B-doped/p-type/Res 12               2 wells                            

N/P-well depth, µm                                                 5/6

Gate SiO2, Å                                                          425

Tunnel SiO2, Å                                                       77

Interlayer dielectric-1: Si3N4, Å                            350

Interlayer dielectric -2: BPSG, Å                           7000

Built-in transistors

Channel length: NMOS/PMOS

Low-voltage transistors, µm                                     2.4

High- voltage transistors, µm                                    3.6

Space line PolySi 1, µm                                           3.2     

Space line PolySi 2, µm                                           4.2

Contacts, mm                                                        Ø 1.2

Space line Me, µm                                                   4.4
The order, cost and terms of fulfillment of orders for the supply of small-scale batches of products are additionally agreed by the Consumer with the marketing and sales services of OJSC "INTEGRAL" - the management company of the holding "INTEGRAL"

Marketing & Sales Department
Tel.: .....(+375 17) 272 3729
       ......(+375 17) 353 2257
Fax:......(+375 17) 353 2257
E-mail: export@integral.by

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