5 V, 1.5 µm CMOS, 1 PolySi, 1 Me, 150mm wafers
5 V, 1.5 µm CMOS, 1 PolySi, 1 Me, 150mm wafers
- Application, features: Digital IMC, microcontrollers with VDD= 5V<br /><br /> <br /><br />NMOS: Vtn= 0.6V, Usd >10 V<br /><br />PMOS: Vtp= 1.0V, Usd >13 V
- Process Description: Number of masks, pcs. 16<br /><br />Design rule,µm 1.5<br /><br />Substrate: Si/B-doped/ p-type/Res 12 2 wells <br /><br />N/P-well depth, µm 5/6<br /><br />Interlayer dielectric: BPSG<br /><br />Gate SiO2, Å 250<br /><br />Interlayer dielectric: BPSG<br /><br />Transistor built in ROM<br /><br />Buried contacts<br /><br />Channel length: NMOS/PMOS, µm 1.5<br /><br /> N & P LDD- drains<br /><br />space line PolySi,µm 2.5<br /><br />contacts, µm Ø 1.5<br /><br />space line Me,µm 3.5