BiCDMOS 600 V, p-n junction isolation, 1 PolySi, 1 Me

BiCDMOS 600 V, p-n junction isolation, 1 PolySi, 1 Me

  • Application, features: SMPS-IC  <br /><br />Low voltage NPN:<br /><br />h21E   50 min, Uсе 30V min<br /><br />PNP Lateral:<br /><br />h21E=2,2-30 Uсе=25-60 V<br /><br />NDMOS: Vtn=1.2-3.0 V,  Usd >=30 V<br /><br />Low voltage PMOS:<br /><br />Vtp=0.8-2.0 V, Usd  >=18 V<br /><br />High voltage PMOS:<br /><br />Vtp=0.8-2.0 V, Usd  >=22 V<br /><br />Low voltage NMOS:<br /><br />Vtn=0.8-2.0 V, Usd  >=18 V<br /><br />High voltage NMOS:<br /><br />Vtn=0.8-2.0 V, Usd  >=600 V
  • Process Description: Number of masks, pcs.                                              15<br /><br />Min design rule,µm                                                     3.0<br /><br />Substrate:           Si/B-doped/ p-type/ Thk 460/ Res 60/ (100)<br /><br />Isolation:                                                        p-n junction<br /><br />NDMOS base depth, µm                                             2.5<br /><br />Gate SiO2, Å                                                                 750<br /><br />Interlayer dielectric – medium temp. PSG, µm       0,8